ENGLISH
CD4518B Dual BCD Up Counter and CD4520B Dual Binary Up Counter each consist of two identical,internally synchronous 4-stage counters. The counter stages are D-type flflip-flflops having interchangeableCLOCK and ENABLE lines for incrementing on either the positive-going or negative-going transition. Forsingleunit operation the ENABLE input is maintained high and the counter advances on each positive-goingtransitionof the CLOCK. The counters are cleared by high levels on their RESET lines. The counter can becascadedin the ripple mode by connecting Q4 to the enable input of the subsequentcounter while the CLOCK input of the latter is held low.
Features
High Voltage Types (20V Rating)
CD4518B Dual BCD Up Counter
CD4520B Dual Binary Up Counter
Medium Speed Operation: 6MHz Typical Clock Frequency at 10V
Positive or Negative Edge Triggering
Synchronous Internal Carry Propagation
100% Tested for Quiescent Current at 20V
5V, 10V and 15V Parametric Ratings
Maximum Input Current of 1µA at 18V Over Full PackageTemperature Range; 100nA at 18V and +25 ℃
Noise Margin (Over Full Package/Temperature Range)- 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
Standardized Symmetrical Output Characteristics
Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specififications for Descriptionof‘B’ Series CMOSDevices”
Applications
Multistage Synchronous Counting
Multistage Ripple Counting
Frequency Dividers
Production Line Live View 1
Production Line Live View 2
Production Line Live View 3
Production Line Live View 4
Production Line Live View 5
Production Line Live View 6
Production Line Live View 7
Production Line Live View 8
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